Reducing the input capacitance to 10p raises the high end to 30 MHz. What determines this value? The transistor inter-electrode capacitance, Beta, and strays. How would we reduce it?
Raising the input Z made the response worse.
Reducing the coupling cap value and the input cap gives a better high end response.
So the question becomes how can the designer control the circuit reactance? Maybe the question is how to work with what he has to get max benefit?
So build the circuit in SPICE and try different values. Look at the transistor datasheet and see what your real world values will be. Above all else have fun.
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